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In a two-level cache system, the access times of L1 and L2 are 4, 15 clock cycles respectively. The miss penalty from the L2 cache to main memory is 30 clock cycles. The miss rate of L1 cache is thrice that of L2. The average memory access time(AMAT) of this cache system is 6 cycles. The miss rates of L1 and L2 respectively are:
i am really confused as to which time is to be considered while solving such questions.

also, the explanation mentioned in the test series is very complicated and lengthy,is there any approach to solve it in a fast manner and get the concept in place right.
ago in CO & Architecture by (20 points) | 13 views
The equation is simple:

AMAT = Hit Time (L1) + Miss Rate (L1)*( Hit Time (L2) + Miss Rate (L2) * ( Miss Penalty L2))

All the values have been given to you, you just need to substitute it.

This is a PYQ -

My suggestion is to take a step back and just understand the hierarchy of cache organization and how it all works. Once you know that you will immediately start writing down the steps as you're reading the question. Memorize the formula only as a last resort, and even then, use the formula only if you know what each term is doing and why. 

I don't suggest memorizing the formula because as you start including various aspects like TLB, cached page tables, write through, write back etc - you will end up memorizing a dozen different formulae, and even then each question could have some minute twist. Better to understand it and work intuitively. Just my two cents.

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