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Consider a system with cycles per instruction (CPI) is 1.0 when all memory accesses hit in the cache. The only data accesses are loads and stores, and these are 50% of the total instructions. If the miss penalty is 30 clock cycles and the miss rate is 5%, how much faster would the computer be if all instructions were cache hits?

1.

1

2.

2.8

3.

3.25

4.

4

ago | 16 views
0

$= 1 + 0.5*(1+0.5)*0.05*30 = 3.25$