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Consider the following statements.

  1. Daisy chaining is used to assign priorities in attending interrupts.
  2. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt.
  3. In polling,the CPU periodically checks the status bits to know if any device needs its attention.
  4. During DMA, both the CPU and DMA controller can be bus masters at the same time.

Which of the above statements is/are TRUE?

  1. Ⅰ and Ⅱ only
  2. Ⅰ and Ⅳ only
  3. Ⅰ and Ⅲ only
  4. Ⅲ only
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