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A DMA controller transfers 32-bit words from an input device to memory in one clock cycle using cycle stealing. The input device transmits data at
a rate of 9600 bytes per second. The CPU is fetching and executing instructions at an average rate of 2,000,000 instructions per second (assume 32-bit instructions). The CPU will be slowed down because of the DMA transfer by ................. percent.
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This question is very much similar to this question: https://gateoverflow.in/62429/ugcnet-dec2015-iii-5

Solution:

DMA controller transfers $32 bit(4 bytes)$ words to memory in cycle stealing mode.
The input device transmits $9600$ bytes per second.
So, for 1 byte it will take $1 / 9600$ sec.
Since the DMA transfers 4 byte in cycle stealing mode, it will take $4 * (1 / 9600) = 1 / 2400$ sec.
So, 2400 bytes will be transferred in cycle stealing mode in one second.

Moreover, it has been given that the CPU is fetching and executing instructions at an average rate of 2,000,000 instructions per second.
Therefor, slow down in DMA transfer $= ( 2400 / 2000000) * 100
= 0.12 %$

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