Recent questions and answers in Digital Logic - GATE CSE Doubts

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self doubt: What is the CNF if the expression is 0 (zero)?

asked 6 days ago in Digital Logic by commenter commenter (30 points) | 17 views

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[Digital] ACE Test Series Test 23 Q24 on 2s complement of fraction

answered Oct 15 in Digital Logic by Priyansh Singh (41 points) | 22 views

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Self Doubt: Digital Logic( Boolean Algebra)
Explain the points mentioned in this question. https://gateoverflow.in/60905/ugcnet-june2015-ii-6

asked Oct 14 in Digital Logic by HeartBleed (52 points) | 9 views

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min terms in f' = max terms in f and vice versa. Is this statement true?

asked Oct 14 in Digital Logic by commenter commenter (30 points) | 9 views

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Digital ACE Test Series Test Q9
Answer is option A

answered Oct 14 in Digital Logic by Pratyush Priyam Kuan (72 points) | 8 views

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Gatebook Test Series: Flip Flop and AND Gate
The pattern detected by the above circuit is? 100 010 110 101

answered Oct 13 in Digital Logic by !KARAN (118 points) | 29 views

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Can someone give summary of all properties/ laws of all digital gates?

asked Oct 13 in Digital Logic by commenter commenter (30 points) | 8 views

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Doubt about Gate 2015 qsn
https://gateoverflow.in/8250/gate2015-2-48 what is the answer of this qsn???? 12 or 19.2 If I follow the formula, the I’l get 19.2 but analyse this problem by drawing ckt diagram & see what happens internally, I’m getting 12 ms. ?????

asked Oct 13 in Digital Logic by MRINMOY_HALDER (32 points) | 16 views

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Gatebook Test Series: Sequence Detector
A sequence detector has to be designed to detect a sequence with at most 3 runs of consecutive zeros of length 3. 001000010001000 This sequence has exactly 2 such runs If we implement a sequential circuit with J-K flip flops then minimum number of flip flops required is ----?

asked Oct 12 in Digital Logic by Lakshman Patel RJIT (101 points) | 18 views

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Gatebook Test Series: Digital Logic - Communication Systems

answered Oct 11 in Digital Logic by Sambhrant Maurya (271 points) | 17 views

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ACE Test Series Digital Test 2 Q2 on Ripple Carry Adder

asked Oct 11 in Digital Logic by DukeThunders (197 points) | 13 views

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Gatebook Test Series: D Flip Flop

asked Oct 11 in Digital Logic by Lakshman Patel RJIT (101 points) | 27 views

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Gatebook Test Series: Flip Flop

asked Oct 11 in Digital Logic by Lakshman Patel RJIT (101 points) | 16 views

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Gatebook Test Series: Digital Logic - Half Adder

answered Oct 11 in Digital Logic by Sambhrant Maurya (271 points) | 18 views

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Gatebook Test Series: Digital Logic - Seven Segment Decoder

asked Oct 11 in Digital Logic by Lakshman Patel RJIT (101 points) | 15 views

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test series ravindra babu ravula
A logic circuit has three inputs w, x, y and an output z. This output ‘z’ is ‘1’ for the following combinations. (i) When x is True (1) and y is False (0) (ii) When w and x are False (0) (iii) When w, x, y are False (0) Then the minimized expression for z is? 1. 2. 3. 4.

asked Oct 7 in Digital Logic by Musa (10 points) | 21 views

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Virtual gate: Digital

asked Oct 7 in Digital Logic by Kushagra गुप्ता (83 points) | 16 views

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Virtual gate: Digital

asked Oct 7 in Digital Logic by Kushagra गुप्ता (83 points) | 18 views

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Gatebook boolean algebra min - terms
The number of Product terms in SOP Expressions after minimizing the following Boolean expression is: $\bigg[D’+AB’+A’C+AC’D+A’C’D\bigg]$ $1$ $2$ $3$ $4$

answered Oct 4 in Digital Logic by Satbir (2.5k points) | 36 views

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Gatebook boolean algebra
What is the time complexity for checking whether an assignment of truth values to variables $x_{1}\dots x_{n}$ satisfies a given formula $f(x_{1},\dots,x_{n})?$ $O(2^{n})$ $O(g(n))$ , where $g$ is a polynomial $O(\log (n))$ None of the above [closed]

asked Oct 4 in Digital Logic by Lakshman Patel RJIT (101 points) | 18 views

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what should be second input to A and B or it perform like SR flip flop

asked Oct 1 in Digital Logic by altamash (41 points) | 14 views

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#madeeasytest
Can anybody explain the concept of power button. and explain this question

asked Sep 26 in Digital Logic by Shawn Frost (10 points) | 17 views

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#madeeasytest
In the solution it is said that we have to add 4 to correct the base 12 ? How come it is 4 . plz explain ? thanks you

asked Sep 26 in Digital Logic by Shawn Frost (10 points) | 20 views

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#madeeasytest
plz explain , my ans was 1 , but the given ans is -7 .

asked Sep 26 in Digital Logic by Shawn Frost (10 points) | 14 views

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Gatebook Practice Question::Number System
Consider the 16-bit floating-point format which has 9 rightmost bits for the mantissa and 6 bits for the excess-31 exponent in the middle and most significant bit stands for sign of the float number. Which of the following represents the difference ... Answer given as: A Please someone explain where I am going wrong and if not, is my solution correct?

asked Sep 25 in Digital Logic by Kushagra गुप्ता (83 points) | 12 views

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Gatebook practice question::Boolean algebra
Consider the logic circuit shown below Answer the following questions: (i) Is there any static hazard? (ii) If yes what is its type,i.e. static-0 or static-1 hazard? (iii) Write a Boolean expression representing f (a, b, c, d) without having any static hazard? (iv) Is there any other type of hazard other than static hazard in this digital circuit?

asked Sep 25 in Digital Logic by Kushagra गुप्ता (83 points) | 11 views

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Gatebook Practice Question::Boolean Algebra
A Boolean function f can be expressed as follows: f = A'BD'E'F' + ABD'F + AB'E'F' + A'BCEF' + AB'D'EF' + A'B'DF when simplified, results into A ⊕ B ⊕ F . Then consider following statements: (A) There are 13 don't care conditions in f ... 46, 53, 55, 61, 63} (E) The function f does not have any don't care conditions as it completely expresses A ⊕ B ⊕ F .

asked Sep 25 in Digital Logic by Kushagra गुप्ता (83 points) | 11 views

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Self doubt-Essential Prime Implicants
F=$\sum m(0,4,5,10,14,15)+d(7,13)$ No. of PI and EPI? By using Quine McCluskey Method this is what i am getting: PI=5, EPI=2 Please verify and if any changes need to be made, do tell.

asked Sep 20 in Digital Logic by Kushagra गुप्ता (83 points) | 29 views

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DLD Test Series
https://csedoubts.gateoverflow.in/?qa=blob&qa_blobid=3574310878027207693 How encoder converts decimal to binary, decoder converts binary to other number system any eg of both ?? Answer is: A

asked Sep 17 in Digital Logic by Dipanshu Rana (15 points) | 10 views

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Nand nor decoder

answered Sep 16 in Digital Logic by Bikram (1.2k points) | 9 views

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Binary Subtraction Self Doubt
Someone please show me the binary subtraction of $10000_{2}-011_{2}$ using borrow method Pls don’t use 2’s complement method

answered Sep 14 in Digital Logic by Bikram (1.2k points) | 14 views

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Morris Mano binary codes
The solution of the quadratic equation X2-11X+22=0 are X=3 and X=6. What is the base of the number

asked Sep 11 in Digital Logic by P PRASHANTI (6 points) | 10 views

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Digital electronics
What is dual of f4=(0,2,4,6)?

asked Sep 7 in Digital Logic by Ayush_pandey (8 points) | 14 views

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Race around problem
How the race around problem avoided by using edge triggered flip-flops?

asked Sep 7 in Digital Logic by Vignaneswarkrishna (6 points) | 11 views

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Ace academy notes
Let t(w,x,y,z) = $\sum$(1, 2, 3, 5, 13)$ + $\sum$\phi$(6, 7, 8, 9, 11, 15)$ and let $f(w, x, y, z)$ be minimal $SOP$ and $g(w, x, y, z)$ be minimal $POS$ – Are $f$ and $g$ identical.

asked Sep 6 in Digital Logic by `JEET (155 points) | 15 views

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Made easy sequential circuit

answered Sep 6 in Digital Logic by Kushagra गुप्ता (83 points) | 14 views

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3 answers

Made easy workbook sequential circuit Q1

answered Sep 3 in Digital Logic by Bikram (1.2k points) | 33 views

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2 answers

Self Doubt-Number of Gates in a function.
Number of two input NAND gates required to implement the below function? F= X’Y’ + XY + Y’Z

answered Sep 1 in Digital Logic by Bikram (1.2k points) | 24 views

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Gate cse 2001 digital logic

asked Aug 30 in Digital Logic by Palash yadav (12 points) | 7 views

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Is sequential programmable devices (digital logic) included in gate syllabus?

asked Aug 29 in Digital Logic by Hyp209 (7 points) | 8 views

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