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Recent questions and answers in Digital Logic
0
votes
1
answer
110
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Trishna Knowledge Systems. GATE Computer Science and Information Technology | GATE 2020 | By Pearson .
pushpraj853
answered
in
Digital Logic
Sep 16, 2021
by
pushpraj853
5
points
110
views
digital-logic
0
votes
0
answers
40
views
Topic : Digital Logic - Adders
I am very much confused while solving the questions involving adder circuits like Half Adder, Full Adder, Ripple Carry Adder, Carry Look Ahead Adder, etc. I can solve none of the questions, and leave almost all questions involving them. My concept ... me some good source from where I can learn them and practice questions on them. It would be really helpful for me.
Abhrajyoti00
asked
in
Digital Logic
Sep 5, 2021
by
Abhrajyoti00
5
points
40
views
digital-logic
0
votes
0
answers
62
views
Trishna Knowledge Systems. GATE Computer Science and Information Technology , Chapter - Digital Electronics ,Unit-1 ,
Bishes
asked
in
Digital Logic
Sep 2, 2021
by
Bishes
5
points
62
views
number-system
0
votes
0
answers
59
views
Introduction to logic circuits and logic design using VHDL, chapter combinational logic design, pg-111.
Noob coder
asked
in
Digital Logic
Sep 2, 2021
by
Noob coder
5
points
59
views
digital-logic
combinational-circuits
self-doubt
dfas
peter-linz
0
votes
2
answers
68
views
Made Easy TextBook Assignments Counters #self doubt
hound_da2
answered
in
Digital Logic
Aug 30, 2021
by
hound_da2
5
points
68
views
counters
digital-logic
0
votes
0
answers
46
views
Is there any specific benefit of using Prime Implicant table in finding minimal SOP for cyclic functions?
RanajitRoy
asked
in
Digital Logic
Aug 24, 2021
by
RanajitRoy
5
points
46
views
self-doubt
k-map
prime-implicants
boolean-expression
min-sum-of-products-form
0
votes
0
answers
39
views
Self Doubt about XOR being linear
Why is xor a linear function as specified on multiple online sources? 01 → 11 is decreasing and 10 → 11 is also decreasing. Shouldn't it be non linear. I want to prove why {XOR, NOT} are not functionally complete.
aryavart
asked
in
Digital Logic
Aug 24, 2021
by
aryavart
73
points
39
views
self-doubt
digital-logic
0
votes
0
answers
59
views
made easy test series
if F is a bool. functio in four variable x.y,z,w f(x,y,z,w)= sum (0,1,4,11,12,13,15) then expension for dual of f is…………..
jugnu1337
asked
in
Digital Logic
Aug 23, 2021
by
jugnu1337
5
points
59
views
made-easy-test-series
0
votes
0
answers
42
views
Sequential Circuits (Digital Logic)
Are Synchronous Circuits easy to implement than Asynchronous Circuits OR the opposite? I have seen varying answers on the internet so this got me confused. Any explanation would help.
Rahul Aryan
asked
in
Digital Logic
Aug 20, 2021
by
Rahul Aryan
5
points
42
views
digital-logic
self-doubt
0
votes
1
answer
43
views
Final exam 2020-2021
If some T FFs are connected in series. The 1st FF is supplied by a clock with frequency 1 MHz and the last FF signal out is 31.25 KHz. Find the number of the Flip Flops are used in the circuit.
ajay_rajpurohit
answered
in
Digital Logic
Aug 18, 2021
by
ajay_rajpurohit
5
points
43
views
digital-logic
digital-electronics
flip-flop
0
votes
0
answers
34
views
KSET 2015 COMPUTER SCIENCE AND APPLICATION
Consider a combinational circuit designed using ROM that accepts a 3-bit number and generates an output binary number equal to the square of the input number.What is minimum size of the ROM ? (A)3 × 4 (B)3 × 8 (C)8 × 4 (D)8 × 8
rsiddana
asked
in
Digital Logic
Aug 12, 2021
by
rsiddana
5
points
34
views
combinational-circuits
digital-logic
0
votes
0
answers
35
views
Morris Mano, Binary System, Question 1.14
For the weighted codes (a) 3, 3, 2, 1 and (b) 4, 4, 3, - 2 for the decimal digits, determine all possible tables so that the 9’s complement of each decimal digit is obtained by changing l’s to 0’s and 0’s to l’s
Sheldon
asked
in
Digital Logic
Aug 12, 2021
by
Sheldon
5
points
35
views
digital-logic
0
votes
1
answer
58
views
Madeeasypostal ACE
"GATE CSE 2000 | Question: 1.6 - GATE Overflow" https://gateoverflow.in/629/gate-cse-2000-question-1-6 In question above we understood that positive number and unsigned is represented same as in 2's complement. here in question below the hex number is ... be same as number given is positive(bcoz msb is not 7). Determine 8's compliment of an octal number 2670? Right??
Sheldon
answered
in
Digital Logic
Aug 12, 2021
by
Sheldon
5
points
58
views
digital-logic
self-doubt
0
votes
1
answer
48
views
ACE TEST SERIES
WHICH OF THE FOLLOWING INDICATES 8`s COMPLEMENT OF $[70700]_8$ IN SIX DIGIT? $[707100]_8$ $[007100]_8$ $[707078]_8$ $[007078]_8$
Sheldon
answered
in
Digital Logic
Aug 12, 2021
by
Sheldon
5
points
48
views
test-series
digital-logic
complementing
0
votes
0
answers
32
views
Digital logic and Computer design by morris mano, Digital design by morris mano and michael d cilleti
ykrishnay
asked
in
Digital Logic
Aug 6, 2021
by
ykrishnay
103
points
32
views
digital-electronics
digital-logic
combinational-circuits
co-and-architecture
0
votes
0
answers
38
views
Digital Logic and Computer Design - Combinational Circuits
This_is_Nimishka
asked
in
Digital Logic
Jul 10, 2021
by
This_is_Nimishka
5
points
38
views
digital-logic
self-doubt
combinational-circuits
0
votes
0
answers
36
views
#digital-logic
Suppose we are using 4-bit carry lookahead adder modules to built a 64-bit adder with a 2- level carry lookahead with ripple carry between the modules. if the delay of base gate(AND OR NOT) is 2 ns , then the worst case delay of 64 bit adder will be _______ ns?
Abhishek tarpara
asked
in
Digital Logic
Jul 5, 2021
by
Abhishek tarpara
13
points
36
views
digital-logic
delay
made-easy-test-series
numerical-answers
0
votes
0
answers
64
views
#testseries #digitallogic #kmap
Which of the following statements are correct? All prime implicants are minterms but all minterms are not prime implicants(PI). If a literal is deleted from a PI then it is no longer remains an implicant. in the k-map, cube corresponding to a prime implicant may be covered by larger cube. Essential prime implicant are those which are appear in final answer.
Abhishek tarpara
asked
in
Digital Logic
Jul 5, 2021
by
Abhishek tarpara
13
points
64
views
digital-logic
multiple-selects
kmap
made-easy-test-series
0
votes
0
answers
39
views
Made Easy Postal course 2018 Number System
Result of subtraction while the following unsigned decimal number by taking the 10's complement of the subtrahend 1753-8640
Ananya Raj
asked
in
Digital Logic
Jun 26, 2021
by
Ananya Raj
5
points
39
views
digital-logic
0
votes
0
answers
87
views
Applied Gate Practice Test
Consider the following counter. If the initial states of Q0(MSB) and Q1(LSB) are 0. What is the sequence Q0 Q1 given by the following diagram?
ketandalvi
asked
in
Digital Logic
Jun 13, 2021
by
ketandalvi
5
points
87
views
digital-logic
test-series
0
votes
1
answer
55
views
Self Doubt (Digital Logic Design)
A ⊕ B can be represented using 4 NAND gates as well as 5 NAND gates. Is there any predefined procedure to find the minimum number of NAND gate required by an expression?
raun220
answered
in
Digital Logic
Jun 8, 2021
by
raun220
23
points
55
views
digital-logic
min-no-gates
self-doubt
0
votes
1
answer
30
views
GeeksforGeeks
F(A,B,C)= A’+BC’ is functionally complete but how to derive AND(.) without using 1 or 0.
raun220
answered
in
Digital Logic
Jun 8, 2021
by
raun220
23
points
30
views
digital-logic
0
votes
0
answers
52
views
Self Doubt(Digital Logic)
Maximum how many number of functions are possible so that F(x,y,z) = F(x,y’,z) ?
Kartik Goyal
asked
in
Digital Logic
Jun 5, 2021
by
Kartik Goyal
5
points
52
views
digital-logic
self-doubt
1
vote
1
answer
146
views
Self dout (Digital Logic Design)
Is the number of min terms always equal to the number of max terms , for a boolean function? Can we say that for a boolean function to be self dual, should satisfy the above condition as well as no mutual exclusive terms should be present?
Deepak Poonia
answered
in
Digital Logic
May 24, 2021
by
Deepak Poonia
1.7k
points
146
views
self-doubt
digital-logic
dual-function
0
votes
0
answers
32
views
Testbook Testseries
For implementing Boolean function F (A, B, C, D) = Σm (0, 1, 2, 4, 6, 9, 12, 14) using 8:1 multiplexer with select lines as B, C and D. Which of the following is correct? I0 and I2 are A̅ I0 and I2 are A I1, I3, and I4 are connected to A̅ I5, I6, and I7 are connected to 0
akabravo97
asked
in
Digital Logic
May 20, 2021
by
akabravo97
5
points
32
views
digital-logic
0
votes
1
answer
57
views
2's complement
how did the range of 2’s complement is -2^(n-1) to (2^(n-1) -1)? particularly for the lower limit?
Kanwae Kan
answered
in
Digital Logic
May 19, 2021
by
Kanwae Kan
5
points
57
views
digital-logic
complement
0
votes
1
answer
68
views
My college homework
Design a synchronous binary counter having the repeated binary sequence 0,2,4,6, 8, 10, 12, 14 using D flip-flops.
Kanwae Kan
answered
in
Digital Logic
May 19, 2021
by
Kanwae Kan
5
points
68
views
digital-logic
0
votes
1
answer
54
views
while solving a flip flop question i came around this situation.
chris gyle
answered
in
Digital Logic
May 6, 2021
by
chris gyle
5
points
54
views
self-doubt
0
votes
2
answers
65
views
Principle of Duality (Digital Logic)
What will be the dual of the following expression? A + B’.[C’+D(E+F’)]
chris gyle
answered
in
Digital Logic
May 6, 2021
by
chris gyle
5
points
65
views
digital-logic
self-doubt
0
votes
0
answers
25
views
how to find the number of d flipflops required for implementing mod -k counter?
ramcharandevathi
asked
in
Digital Logic
May 6, 2021
by
ramcharandevathi
5
points
25
views
self-doubt
0
votes
0
answers
29
views
GATE ECE PREVIOUS YEAR QUESTIONS BOOK
Atulvstar
asked
in
Digital Logic
Mar 6, 2021
by
Atulvstar
5
points
29
views
self-doubt
1
vote
0
answers
74
views
TIFR 2020 Question 1 Computer Science section
Consider the following Boolean valued function on n Boolean variables: f(x1, ,xn)=x1+⋯+xn(mod 2), where addition is over integers, mapping FALSE' to 0 and TRUE' to 1. Consider Boolean circuits (with no feedback) that use only logical AND and OR gates, and ... 2^o(logn) n^c, for some fixed constant c n^ω(1), but n^O(logn) 2^Θ(n) None of the others
harleenkaur
asked
in
Digital Logic
Feb 28, 2021
by
harleenkaur
9
points
74
views
self-doubt
2
votes
3
answers
958
views
GATE CSE 2021 Set 2 | Question: 4 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
958
views
gate2021-cse-set2
digital-logic
number-representation
ieee-representation
3
votes
4
answers
847
views
GATE CSE 2021 Set 2 | Question: 5 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
847
views
gate2021-cse-set2
digital-logic
combinational-circuits
multiplexer
1
vote
2
answers
667
views
GATE CSE 2021 Set 2 | Question: 18 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
667
views
gate2021-cse-set2
numerical-answers
digital-logic
number-system
number-representation
4
votes
4
answers
2.5k
views
GATE CSE 2021 Set 2 | Question: 44 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
2.5k
views
gate2021-cse-set2
multiple-selects
digital-logic
number-representation
little-endian-big-endian
3
votes
2
answers
1.1k
views
GATE CSE 2021 Set 2 | Question: 52 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
1.1k
views
gate2021-cse-set2
digital-logic
boolean-algebra
min-sum-of-products-form
numerical-answers
1
vote
4
answers
606
views
GATE CSE 2021 Set 1 | Question: 6 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
606
views
gate2021-cse-set1
digital-logic
number-system
number-representation
normal
0
votes
4
answers
732
views
GATE CSE 2021 Set 1 | Question: 24 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
732
views
gate2021-cse-set1
digital-logic
number-representation
ieee-representation
numerical-answers
1
vote
3
answers
615
views
GATE CSE 2021 Set 1 | Question: 28 | Video Solution
Arjun
asked
in
Digital Logic
Feb 18, 2021
by
Arjun
1.4k
points
615
views
gate2021-cse-set1
digital-logic
sequential-circuit
digital-counter
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