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Recent questions tagged gate2005

Recent questions tagged gate2005
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GATE2005-68 Video Solution
A $5$ stage pipelined CPU has the following sequence of stages: IF - instruction fetch from instruction memory RD - Instruction decode and register read EX - Execute: ALU operation for data and address computation MA - Data memory access - for write access, the ... taken to complete the above sequence of instructions starting from the fetch of $I_1$? $8$ $10$ $12$ $15$
admin asked in CO & Architecture Apr 18, 2020
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0 answers 36 views
GATE2005-70 Video Solution
Consider a disk drive with the following specifications: $16$ surfaces, $512$ tracks/surface, $512$ sectors/track, $1$ KB/sector, rotation speed $3000$ rpm. The disk is operated in cycle stealing mode whereby whenever one $4$ byte word is ready it is sent ... $40$ nsec. The maximum percentage of time that the CPU gets blocked during DMA operation is: $10$ $25$ $40$ $50$
admin asked in CO & Architecture Apr 18, 2020
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585 points
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0 answers 27 views
GATE2005-74 Video Solution
Suppose the round trip propagation delay for a $10\text{ Mbps}$ Ethernet having $48\text{-bit}$ jamming signal is $46.4\ \mu s$. The minimum frame size is: $94$ $416$ $464$ $512$
admin asked in Computer Networks Apr 18, 2020
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GATE2005-65 Video Solution
Consider a three word machine instruction $ADD A[R_0], @B$ The first operand (destination) $A[R_0]$ uses indexed addressing mode with $R_0$ as the index register. The second operand (source) [email protected]$ uses indirect addressing mode. $A$ and $B$ are ... (first operand). The number of memory cycles needed during the execution cycle of the instruction is: $3$ $4$ $5$ $6$
admin asked in CO & Architecture Apr 18, 2020
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0 answers 25 views
GATE2005-22, ISRO2015-36 Video Solution
Increasing the RAM of a computer typically improves performance because: Virtual Memory increases Larger RAMs are faster Fewer page faults occur Fewer segmentation faults occur
admin asked in Operating System Apr 18, 2020
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GATE2005-73 Video Solution
In a packet switching network, packets are routed from source to destination along a single path having two intermediate nodes. If the message size is $24$ bytes and each packet contains a header of $3$ bytes, then the optimum packet size is: $4$ $6$ $7$ $9$
admin asked in Computer Networks Apr 18, 2020
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0 answers 13 views
GATE2005-72 Video Solution
Consider the following code fragment: if (fork() == 0) { a = a + 5; printf("%d, %p n", a, &a); } else { a = a - 5; printf ("%d, %p n", a,& a); } Let $u,v$ be the values printed by the parent process and $x,y$ be the values printed by the child ... $u + 10 = x \text{ and } v = y$ $u + 10 = x \text{ and } v != y$
admin asked in Operating System Apr 18, 2020
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0 answers 28 views
GATE2005-83a Video Solution
Statement for Linked Answer Questions 83a & 83b: Consider the following expression grammar. The semantic rules for expression evaluation are stated next to each grammar production. ... a reduce action It detects shift-reduce conflict, and resolves the conflict in favor of a reduce over a shift action
admin asked in Compiler Design Apr 18, 2020
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GATE2005-39 Video Solution
Suppose there are $\lceil \log n \rceil$ sorted lists of $\lfloor n /\log n \rfloor$ elements each. The time complexity of producing a sorted list of all these elements is: (Hint:Use a heap data structure) $O(n \log \log n)$ $\Theta(n \log n)$ $\Omega(n \log n)$ $\Omega\left(n^{3/2}\right)$
admin asked in Algorithms Apr 18, 2020
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0 answers 23 views
GATE2005-79 Video Solution
Consider the following data path of a CPU. The ALU, the bus and all the registers in the data path are of identical size. All operations including incrementation of the PC and the GPRs are to be carried out in the ALU. Two clock cycles are needed for memory ... R0 + R1. The minimum number of clock cycles needed for execution cycle of this instruction is: $2$ $3$ $4$ $5$
admin asked in CO & Architecture Apr 18, 2020
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0 answers 30 views
GATE2005-80 Video Solution
The ALU, the bus and all the registers in the data path are of identical size. All operations including incrementation of the PC and the GPRs are to be carried out in the ALU. Two clock cycles are needed for memory read operation - the first one for ... ; The minimum number of CPU clock cycles needed during the execution cycle of this instruction is: $2$ $3$ $4$ $5$
admin asked in CO & Architecture Apr 18, 2020
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585 points
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0 answers 17 views
GATE2005-7 Video Solution
The time complexity of computing the transitive closure of a binary relation on a set of $n$ elements is known to be: $O(n)$ $O(n \log n)$ $O \left( n^{\frac{3}{2}} \right)$ $O\left(n^3\right)$
admin asked in Set Theory & Algebra Apr 18, 2020
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0 answers 14 views
GATE2005-69 Video Solution
A device with data transfer rate $10$ KB/sec is connected to a CPU. Data is transferred byte-wise. Let the interrupt overhead be $4\mu$sec. The byte transfer time between the device interface register and CPU or memory is negligible. What is ... gain of operating the device under interrupt mode over operating it under program-controlled mode? $15$ $25$ $35$ $45$
admin asked in CO & Architecture Apr 18, 2020
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585 points
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0 answers 9 views
GATE2005-62 Video Solution
Consider the following circuit involving a positive edge triggered D FF. Consider the following timing diagram. Let $A_{i}$ represents the logic level on the line a in the i-th clock period. Let $A'$ represent the compliment of $A$. The correct output sequence on $Y$ over the clock periods $1$ ... $A_{1} A_{2} A_{2}' A_{3} A_{4}$ $A_{1} A_{2}' A_{3} A_{4} A_{5}'$
admin asked in Digital Logic Apr 18, 2020
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585 points
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0 answers 27 views
GATE2005-61 Video Solution
Consider line number $3$ of the following C-program. int main() { /*Line 1 */ int I, N; /*Line 2 */ fro (I=0, I<N, I++); /*Line 3 */ } Identify the compiler’s response about this line while creating the object-module: No compilation error Only a lexical error Only syntactic errors Both lexical and syntactic errors
admin asked in Compiler Design Apr 18, 2020
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585 points
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0 answers 15 views
GATE2005-81a Video Solution
double foo(int n) { int i; double sum; if(n == 0) { return 1.0; } else { sum = 0.0; for(i = 0; i < n; i++) { sum += foo(i); } return sum; } } The space complexity of the above code is? $O(1)$ $O(n)$ $O(n!)$ $n^n$
admin asked in Programming Apr 18, 2020
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585 points
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0 answers 21 views
GATE2005-23 Video Solution
Packets of the same session may be routed through different paths in: TCP, but not UDP TCP and UDP UDP, but not TCP Neither TCP nor UDP
admin asked in Computer Networks Apr 18, 2020
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585 points
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GATE2005-19 Video Solution
Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line? Neither vectored interrupt nor multiple interrupting devices are possible Vectored interrupts are not possible ... and multiple interrupting devices are both possible Vectored interrupts are possible but multiple interrupting devices are not possible
admin asked in Operating System Apr 18, 2020
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585 points
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GATE2005-85-a Video Solution
Consider the following floating-point format. Mantissa is a pure fraction in sign-magnitude form. The decimal number 0.239 $\times$ 2$^{13}$ has the following hexadecimal representation (without normalization and rounding off): 0D 24 0D 4D 4D 0D 4D 3D
admin asked in Digital Logic Apr 18, 2020
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585 points
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0 answers 13 views
GATE2005-27 Video Solution
An organization has a class $B$ network and wishes to form subnets for $64$ departments. The subnet mask would be: $255.255.0.0$ $255.255.64.0$ $255.255.128.0$ $255.255.252.0$
admin asked in Computer Networks Apr 18, 2020
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585 points
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0 answers 25 views
GATE2005-44 Video Solution
What is the minimum number of ordered pairs of non-negative numbers that should be chosen to ensure that there are two pairs $(a,b)$ and $(c,d)$ in the chosen set such that, $a \equiv c\mod 3$ and $b \equiv d \mod 5$ $4$ $6$ $16$ $24$
admin asked in Combinatory Apr 18, 2020
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GATE2005-38 Video Solution
Let $G(V,E)$ be an undirected graph with positive edge weights. Dijkstra’s single source shortest path algorithm can be implemented using the binary heap data structure with time complexity: $O\left(|V|^2\right)$ $O\left(|E|+|V|\log |V|\right)$ $O\left(|V|\log|V|\right)$ $O\left(\left(|E|+|V|\right)\log|V|\right)$
admin asked in Algorithms Apr 18, 2020
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585 points
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0 answers 22 views
GATE2005-32 Video Solution
Consider the following C program: double foo (double); /* Line 1 */ int main() { double da, db; //input da db = foo(da); } double foo (double a) { return a; } The above code compiled without any error ... or error some compiler-warnings not leading to unintended results some compiler-warnings due to type-mismatch eventually leading to unintended results compiler errors
admin asked in Programming Apr 18, 2020
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585 points
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0 answers 15 views
GATE2005-28 Video Solution
Which of the following is a key factor for preferring $B^+$-trees to binary search trees for indexing database relations? Database relations have a large number of records Database relations are sorted on the primary key $B^+$-trees require less memory than binary search trees Data transfer form disks is in blocks
admin asked in Databases Apr 18, 2020
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585 points
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0 answers 25 views
GATE2005-5 Video Solution
A program $P$ reads in $500$ integers in the range $[0, 100]$ representing the scores of $500$ students. It then prints the frequency of each score above $50$. What would be the best way for $P$ to store the frequencies? An array of $50$ numbers An array of $100$ numbers An array of $500$ numbers A dynamically allocated array of $550$ numbers
admin asked in DS Apr 18, 2020
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585 points
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0 votes
0 answers 17 views
GATE2005-25 Video Solution
The maximum window size for data transmission using the selective reject protocol with $n\text{-bit}$ frame sequence numbers is: $2^n$ $2^{n-1}$ $2^n-1$ $2^{n-2}$
admin asked in Computer Networks Apr 18, 2020
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585 points
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0 answers 18 views
GATE2005-14 Video Solution
The grammar $A \rightarrow AA \mid (A) \mid \epsilon$ is not suitable for predictive-parsing because the grammar is: ambiguous left-recursive right-recursive an operator-grammar
admin asked in Compiler Design Apr 18, 2020
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GATE2005-16, ISRO2009-18, ISRO2015-2 Video Solution
admin asked in Digital Logic Apr 18, 2020
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585 points
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0 answers 16 views
GATE2005-67 Video Solution
Consider a direct mapped cache of size $32$ $KB$ with block size $32$ $bytes$. The $CPU$ generates $32$ $bit$ addresses. The number of bits needed for cache indexing and the number of tag bits are respectively, $10, 17$ $10, 22$ $15, 17$ $5, 17$
admin asked in CO & Architecture Apr 18, 2020
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585 points
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0 answers 22 views
GATE2005-71 Video Solution
Suppose $n$ processes, $P_1, \dots P_n$ share $m$ identical resource units, which can be reserved and released one at a time. The maximum resource requirement of process $P_i$ is $s_i$, where $s_i > 0$. Which one of the following is a sufficient condition for ensuring that deadlock ... $\displaystyle{\sum_{i=1}^n} \: s_i < (m \times n)$
admin asked in Operating System Apr 18, 2020
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585 points
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0 answers 20 views
GATE2005-20 Video Solution
Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instruction privileged. In a CPU with memory mapped I/O ... I/O protection is ensured by a hardware trap I/O protection is ensured during system configuration I/O protection is not possible
admin asked in Operating System Apr 18, 2020
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585 points
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GATE2005-30 Video Solution
Let r be a relation instance with schema R = (A, B, C, D). We define $r_1 = \pi_{A, B, C} (R)$ and $r_2=\pi_{A, D} (r)$. Let $s =r_1 \: * \: r_2$ where $*$ denotes natural join. Given that the decomposition of $r$ into $r_1$ and $r_2$ is lossy, which one of the following is TRUE? $s \subset r$ $r \cup s =r$ $r \subset s$ $r*s=s$
admin asked in Databases Apr 18, 2020
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585 points
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0 answers 14 views
GATE2005-36 Video Solution
In a complete $k$-ary tree, every internal node has exactly $k$ children. The number of leaves in such a tree with $n$ internal node is: $nk$ $(n-1)k + 1$ $n(k-1) +1$ $n(k-1)$
admin asked in DS Apr 18, 2020
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585 points
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0 answers 22 views
GATE2005-60 Video Solution
Consider the grammar: $S \rightarrow (S) \mid a$ Let the number of states in SLR (1), LR(1) and LALR(1) parsers for the grammar be $n_1, n_2$ and $n_3$ respectively. The following relationship holds good: $n_1 < n_2 < n_3$ $n_1 = n_3 < n_2$ $n_1 = n_2 = n_3$ $n_1 \geq n_3 \geq n_2$
admin asked in Compiler Design Apr 18, 2020
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585 points
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0 answers 28 views
GATE2005-83b Video Solution
Consider the following expression grammar. The semantic rules for expression evaluation are stated next to each grammar production. ... of $+$' is higher than that of $\times$', and both operators are left associative; expression is evaluated to $9$
admin asked in Compiler Design Apr 18, 2020
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585 points
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GATE2005-41 Video Solution
What is the first order predicate calculus statement equivalent to the following? "Every teacher is liked by some student" $∀(x)\left[\text{teacher}\left(x\right) → ∃(y) \left[\text{student}\left(y\right) → \text{likes}\left(y,x\right)\right]\right]$ ...
admin asked in Mathematical Logic Apr 18, 2020
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585 points
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0 answers 18 views
GATE2005-45 Video Solution
Consider three decision problems $P_1$, $P_2$ and $P_3$. It is known that $P_1$ is decidable and $P_2$ is undecidable. Which one of the following is TRUE? $P_3$ is decidable if $P_1$ is reducible to $P_3$ $P_3$ is undecidable if $P_3$ is reducible to $P_2$ $P_3$ is undecidable if $P_2$ is reducible to $P_3$ $P_3$ is decidable if $P_3$ is reducible to $P_2$'s complement
admin asked in Theory of Computation Apr 18, 2020
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585 points
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GATE2005-59 Video Solution
Consider the grammar: $E \rightarrow E + n \mid E \times n \mid n$ For a sentence $n + n \times n$, the handles in the right-sentential form of the reduction are: $n, E + n$ and $E + n \times n$ $n, E + n$ and $E + E \times n$ $n, n + n$ and $n + n \times n$ $n, E + n$ and $E \times n$
admin asked in Compiler Design Apr 18, 2020
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585 points
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