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Recent questions tagged paging

Recent questions tagged paging
0 votes
0 answers 56 views
https://www.cs.utexas.edu/~lorenzo/corsi/cs372/06F/hw/3sol.html
Pranavapp asked in Operating System Apr 13
by Pranavapp
5 points
56 views
0 votes
0 answers 38 views
https://www.cs.utexas.edu/~lorenzo/corsi/cs372/06F/hw/3sol.html
Pranavapp asked in Operating System Apr 13
by Pranavapp
5 points
38 views
2 votes
0 answers 48 views
Paging. Self-Doubt
Here I solved this in this way .. Since the virtual address space is 32-bit long and the first 8 bit specifies the first-level index. Next is the Offset of the page which is 12 from the first line. Coincidently, 20 bit are still left here and it ... this might be the answer. For reference, the answer to the solution is given . Thanks in advance. Is my approach wrong or correct?
kirtipurohit asked in Operating System Mar 20
by kirtipurohit
15 points
48 views
0 votes
0 answers 23 views
#paging #operatingsystem #gateCSE #gateOperatingSystem
cheNavya asked in Operating System Feb 21
by cheNavya
5 points
23 views
0 votes
0 answers 64 views
Applied Mock Test
Find the Effective Time
Sahil91 asked in Operating System Jan 26
by Sahil91
683 points
64 views
0 votes
0 answers 17 views
#MadeEasyTestSeries
In a demand paging system with a paging disk that has an average access and transfer time of 45 milliseconds. Address are mapped through a page table in main memory, with an access time of 75 us per memory access. An associative memory (TLB) is added to reduce ... in this question we have consider 2 micro sec for TLBmiss i.e. (1+1) i.e page table acccess+main memory access time
rupesh17 asked in Operating System Dec 11, 2020
by rupesh17
5 points
17 views
0 votes
0 answers 104 views
Applied Test Series-OS
Consider a system using a segmented paging architecture. The segment is divided into 8k pages each of size 2k words . The segment table is divided into 256 k pages each of size 512 words. The page table entry size requires 64 bits . The frame number requires 22 bits ... +24) Segment No-(24) Offset(24) segment no= (256K*512B)/8B Offset = 8K*2KB. Please Correct me if am wrong.
Sahil91 asked in Operating System Nov 15, 2020
by Sahil91
683 points
104 views
0 votes
0 answers 21 views
Trishna Knowledge Systems Practice Tests
Given the following information: TLB hit rate 95%, TLB access time is 1 cycle. cache hit rate 90 %, cache access time is 1 cycle. When TLB and cache both get miss; page fault rate is 1% The TLB access and cache access are sequential. ... memory access latencies when the cache is physically addresses (in cycles). A) 2.45 B) 9.35 C) 15.75 D) 18.25
SarathBaswa asked in Operating System Nov 10, 2020
by SarathBaswa
855 points
21 views
0 votes
0 answers 36 views
Made Easy - Memory management and Paging
#OS Memory Management Question on Paging and Translation Look-aside Buffer (TLB)
dhruvikk6 asked in Operating System Aug 29, 2020
by dhruvikk6
5 points
36 views
0 votes
0 answers 39 views
4 Level Page Table Doubt. (Udacity lecture: "4 Level PT Solution Quiz - Georgia Tech - HPCA: Part 4")
RasMalai asked in Operating System Aug 1, 2020
by RasMalai
27 points
39 views
0 votes
0 answers 49 views
Multilevel Paging: Gradeup exercise Problem
consider a s/m using 2 level paging where IPT divided into 512 pages each 2K bytes. if PAS divided into 512 frames with supported PA of 21 bits. calculate the size of TOTAL LAS & also size of OPT & IPT if PT Entires are 2B each
Sgr007 asked in Operating System Jul 29, 2020
by Sgr007
21 points
49 views
0 votes
0 answers 32 views
#Doubt Gate 2003-26
In this pqy : https://gateoverflow.in/916/gate2003-26, the selected answer says that there is no external fragmentation. Since it is only 1 level paging and the page table size after calculation is greater than page size, so it can't be ... page size and thus causes external fragmentation. So, shouldn't the translation not be possible because of external frag at first place.
pranavsettaluri9 asked in Operating System Jul 17, 2020
by pranavsettaluri9
5 points
32 views
0 votes
0 answers 15 views
Operating system
Can anyone summarise all the possible formulas regarding Tlb (involving pagefaults,cache,dirty write etc)
sreejit007 asked in Operating System Jun 14, 2020
by sreejit007
5 points
15 views
0 votes
0 answers 63 views
Memory Mangement #OS#GATE
In demand paging system CPU Utilization 20% Paging Disk 97.7% Other I/O device 5% Which will probably improve CPU Utilization? Increase the degree of multiprogramming Decrease the degree of multiprogramming Increase the page size None of these. Please explain.
sushmitagoswami asked in Operating System Apr 16, 2020
by sushmitagoswami
5 points
63 views
0 votes
0 answers 132 views
Operating System
Suppose that a disk drive has 5,000 cylinders, numbered 0 to 4999. The drive is currently serving a request at cylinder 143, and the previous request was at cylinder 125. The queue of pending requests, in FIFO order, is: 86,1470, 913, 1774, ... what is the total distance (in cylinders) that the disk arm moves to satisfy all the pending requests for SCAN disk scheduling algorithm?
unknown_a asked in Operating System Apr 11, 2020
by unknown_a
5 points
132 views
0 votes
0 answers 13 views
No bits in Frames
Account for the validity and justification about the correctness of this statement " Whatever level page table is always the number of bits which are going to refer a frame number will always going to be same "
smsubham asked in Operating System Mar 18, 2020
by smsubham
33 points
13 views
0 votes
0 answers 81 views
Multi-Level Paging
How many levels of paging is required such that outer page table fits in one page size assuming page size=4 KB and page table entry size=4 B at all levels and logical address=64 bits?
Srush asked in Operating System Feb 4, 2020
by Srush
5 points
81 views
0 votes
0 answers 66 views
RBR Test Series
Priyansh Singh asked in Operating System Dec 11, 2019
by Priyansh Singh
227 points
66 views
0 votes
0 answers 31 views
self doubt-demand paging and virtual memory
1>Can demand paging exists without virtual memery? 2>And is virtual memory of any use without demand paging?
Doraemon asked in Operating System Nov 26, 2019
by Doraemon
73 points
31 views
0 votes
0 answers 314 views
TLB with demand paging
Formula 1 EAT with page fault in demand paging = Page fault rate * {Effective Access Time without page fault + Page fault service time} + (1 - Page fault rate) * {Effective Access time without page fault} Where, Effective Access Time without ... while solving questions ? I am getting confused when to apply which formula. According to me we should always use formula 1.
Satbir asked in Operating System Nov 13, 2019
by Satbir
7k points
314 views
0 votes
0 answers 77 views
Segmented paging Self Doubt
In segmented paging the logical address space of a program is divided into variable sized segments. Further the segments are divided into fixed size pages The page sizes of different segments are same or different?
aditi19 asked in Operating System Sep 13, 2019
by aditi19
59 points
77 views
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