# Galvin 7th edition page 350

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Using a page size of 4 bytes and a physical memory of 32 bytes (8
pages)! we show how the user's view of memory can be mapped into physical
memory. Logical address 0 is page O! offset O. Indexing into the page table! we
find that page 0 is in frame 5. Thus! logical address 0 maps to physical address
20 (= (5 x 4) + 0). Logical address 3 (page 0, offset 3) maps to physical address
23 (= (5 x 4) + 3). Logical address 4 is page 1, offset 0; according to the page
table, page 1 is mapped to frame 6. Thus, logical address 4 maps to physical
address 24 (= (6 x 4) + 0).

This is from Galvin please xpln

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@afroze

## Size of the page table However, the part of the process which is being executed by the CPU must be present in the main memory during that time period...

The page table must also be present in the main memory all the time because it has the entry for all the pages. The size of the page table depends upon the number of entries in the table and the bytes stored in one entry....

Let's consider, Logical Address = 24 bits

Logical Address space = 2 ^ 24 bytes Let's say,

Page size = 4 KB = 2 ^ 12 Bytes

Page offset = 12

Number of bits in a page = Logical Address - Page Offset = 24 - 12 = 12 bits

Number of pages = 2 ^ 12 = 2 X 2 X 10 ^ 10 = 4 KB Let's say,

Page table entry = 1 Byte Therefore, the size of the page table = 4 KB X 1 Byte = 4 KB

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@afroze

## 4. https://www.geeksforgeeks.org/paging-in-operating-system/

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Thnx for answering u clrd my many doubts.

it means

if offset=5 then a page has 32 offset values 0-31 isn't it?
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@afroze