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Can anyone give link of PDF of gate CS questions with solutions for the subject Digital Logic only if available. I only need one subject as it is common with Electrical...

 

Digital Logic only if available ...

 

1. https://www.youtube.com/playlist?list=PL803563859BF7ED8C 

2. https://www.youtube.com/playlist?list=PLUtfVcb-iqn8ff92DJ0SZqwsX4W1s_oab 

  1.  https://gateoverflow.in/questions/digital-logic 
  1. https://gatecse.in/digital-logic/
  1. https://gateoverflow.in/tag/boolean-algebra 

 

  1. https://gateoverflow.in/tag/boolean-algebra?start=240 

 

  1. https://gateoverflow.in/tag/circuit-output 

 

  1. https://gateoverflow.in/tag/circuit-output?start=60 

 

  1. https://gateoverflow.in/tag/canonical-normal-form 
  1. https://gateoverflow.in/tag/number-representation 

 

  1. https://gateoverflow.in/tag/number-representation?start=240 

 

  1. http://www.cs.cornell.edu/~tomf/notes/cps104/twoscomp.html  

 

  1. https://www.ele.uri.edu/courses/ele447/proj_pages/divid/twos.html 

 

  1. https://gateoverflow.in/tag/floating-point-representation 

 

  1. https://gateoverflow.in/tag/floating-point-representation?start=60 

 

Syllabus

Boolean algebra.

Combinational and sequential circuits. Minimization. Number representations and computer arithmetic (fixed and floating point)...

Reference Book

Digital Design –

Morris Mano 3rd Edition ..

 

Topics :

Boolean algebra :

Laws of Boolean algebra, Theorems of Boolean algebra, Switching functions, Methods for specification of switching functions - Truth tables and Algebraic forms, Realization of functions using logic gates ..

Combinational and sequential circuits :

I. Design of Combinational Logic Circuits:

• Gate level design of Small Scale Integration (SSI) circuits, Modular combinational logic elements - Decoders, Encoders, Priority encoders, Multiplexers and Demultiplexers. • Design of Integer Arithmetic Circuits using Combinational Logic: (Application )

• Integer adders - Ripple carry adder and Carry look ahead adder, Integer subtractors using adders, Unsigned integer multipliers - Combinational array circuits, Signed integer multipliers - Booth's coding, Bit-pair recoding, Carry save addition and Wallace tree multiplier. • Signed integer division circuits - Combinational array circuits, Complexity and propagation delay, analysis of circuits....

 

II. Sequential Circuit Elements:

Latches -RS latch and JK latch, Flip-flops-RS, JK, T and D flip flops, Master-slave flip-flops, Edge-triggered flip-flops....

 

III. Analysis and Design of Synchronous Sequential Circuits:

• Models of sequential circuits - Moore machine and Mealy machine • Flip-flops - Characteristic table, Characteristic equation and Excitation table•

• Analysis of sequential circuits- Flipflop input expressions, Next state equations, Next state maps, State table and State transition diagram • Modular sequential logic circuits - Shift registers, Registers, Counters and Random access memories ...

 

IV. Design of Arithmetic Circuits using Sequential Logic :

Serial adder for integers, Unsigned integer multiplier, Unsigned integer division circuits, Signed integer division, Floating-point adder/subtractor - Design of control circuit, Floating ...

 

V. Introduction to digital computer :

• Design of Arithmetic circuits – Adders, Multipliers • Design of Memory – ROM/RAM • Minimization (Simplification of Boolean Expressions and Functions ) : • Algebraic methods, Canonical forms of Boolean functions, Minimization of functions using • Karnaugh maps, Minimization of functions using Quine-McClusky method.

• Number representations and computer arithmetic (fixed and floating point) : • Number systems and codes - ( Binary, octal and hexadecimal number systems; Methods of base conversions; Binary, octal and hexadecimal arithmetic) • Representation of unsigned and signed integers, Fixed-point representation of real numbers, Floating-point representation of real numbers ....

Types of Problems

• Practice K-Map minimization. SOP, POS forms and Don't care representation • Practice questions related to Floating Point representation, integer representation,

• IEEE format, range and precision.

• Determining minimum number of NAND/NOR gates required to realize a boolean expression [2004, 2009]

• For a given truth table, find the function • Important flip flops - J-K, D, T, R-S type of flip flops. For given flip-flops, modulus of counter is asked.

• Questions on J-K flip flop state sequence [2014, 2015]

• Calculate the propagation delay in flip flops

• 4 Input multiplexer 4 to 1, determine the output [2010,2014]

• For a given sequence, find out minimum number of j-k flip flip require to implement the counter [2016 , 2015] Questions on counters were asked in 2004, 2007, 2011, 2014

• Design of counter using flip flop [2015, 2016] Propagation delay of adder – [2004 - 62] , [2015 Set 1 – 47, Set 2 – 65 ]....

 

1. https://www.mediafire.com/folder/gp6z7khjzyl8d/gate_materials?fbclid=IwAR3S8QcR2hciu58DRCydSyBPUw35LunvcP57VHLHPLq-AEBoojNzaJO7A5c#k8zi14x8wzvi3 

 

2. http://www.mediafire.com/file/dgelw7bboqf9w4w/Digital_Logic_And_Computer_Design_by_M._Morris_Mano_Solution_Manual_%2528ciitbooks.blogspot.com%2529.pdf/file?fbclid=IwAR0q0ZeUkZpezvwvD190FWl-cX3sBCg369j2XZsi38CCxAT6nwdhuR6DwLQ 

 

3. http://www.mediafire.com/file/hih2jqbhb6d3hf1/Solution_manual__M_mano_and_C_Kime_Logic_and_Computer_design_Fundamental_.pdf/file?fbclid=IwAR3JbqB2vJAvQ6LVwvi92dOzYMTq0a-pkSrACSCKidGI2loI7a_GqpRMFJ0 

 

4. http://www.mediafire.com/file/7yj1iymzj8sd804/floatingpoint.ppt/file?fbclid=IwAR3fJ_2BHCYRGhp_PiJAOYb3nEkmOJU5T3o9bAMFqYcwKeJJn_KxZU-V9rs

 

 

5. https://www.cs.cornell.edu/~tomf/notes/cps104/twoscomp.html 

 

https://drive.google.com/file/d/0Byt7-j-JD0d0bmxlRkZGcjN2cjA/view

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2 Answers

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Best answer

What is good resources for studing Computer Architecture and Organization?

 

1. https://gateoverflow.in/blog/9728/some-good-resources-for-computer-organisation-architecture 

2. https://gateoverflow.in/140573/%25-time-of-cpu-blocked-in-dma 

3. https://gateoverflow.in/140573/%25-time-of-cpu-blocked-in-dma?show=140576#a140576 

4. https://gatecse.in/co-architecture/ 

5. https://gateoverflow.in/questions/co-and-architecture 

6. https://courses.cs.washington.edu/courses/cse378/07au/lectures/L11-Pipelined-Datapath-And.pdf 

7. https://gateoverflow.in/tag/machine-instructions 

8. https://gateoverflow.in/tag/machine-instructions?start=60 

9. https://gateoverflow.in/tag/addressing-modes 

10. https://gateoverflow.in/tag/addressing-modes?start=120 

11. https://gateoverflow.in/tag/microprogramming 

12. https://gateoverflow.in/tag/microprogramming?start=60 

13. https://gateoverflow.in/tag/pipelining 

14. https://gateoverflow.in/tag/pipelining?start=360 

15. https://gateoverflow.in/tag/cache-memory 

 

16. https://gateoverflow.in/tag/cache-memory?start=510 

 

17. http://csillustrated.berkeley.edu/PDFs/handouts/cache-3-associativity-handout.pdf 

 

18. https://www.cs.utah.edu/~rajeev/cs3810/slides/3810-20.pdf 

19. https://gateoverflow.in/tag/io-handling 

20. https://gateoverflow.in/tag/io-handling?start=30 

21. https://gateoverflow.in/tag/interrupts 

22. https://gateoverflow.in/tag/interrupts?start=60 

23. https://gateoverflow.in/tag/dma 

24. https://gateoverflow.in/tag/dma?start=90 

25. https://www.cse.iitk.ac.in/users/biswap/lectures-CS422.html 

 

26. https://www.youtube.com/playlist?list=PL1A5A6AE8AFC187B7

 

27. https://www.youtube.com/playlist?list=PL2F82ECDF8BB71B0C 

 

Syllabus

Machine instructions and addressing modes, ALU and data-path, CPU control design, Memory hierarchy, I/O interface (Interrupt and DMA mode), Instruction pipelining, Cache and main memory, Secondary storage....

 

Reference Books

• Hamacher and Zaky 5th Edition

• Computer Organization by Morris Mano 3rd Edition

• William Stallings - International edition

• Fundamental of COA by Mostafa

 

Topics and Chapters

 

Instruction set architecture :

Instruction types, Instruction formats, addressing modes. [Zaky] 2.4 and 2.5 [Mano] 8.4, 8.5 , 5.1,5.2 5.3, 5.4, 5.5 ..

 

Arithmetic :

Representation of fixed and floating-point numbers, 2's complement arithmetic. [Zaky] 6.1,6.4 (Booth's algo), 6.7(IEEE standards) [Mano] 3.2,3.3,3.4 ,10.2,10.3(Booth),10.5 …...

 

Control unit :

Organization of a CPU, control and data paths, micro-operations, register- transfer level specifications [Zaky] 7.1 , 7.2, 7.4, 7.5 [Mano] 4.1,4.2 , 7.4

 

For RTL : Page 37, read 2.1, 2.2, 2.3 transfer level specifications

 

For Datapath :

Page 414 Memory system :

Typical signal lines in a ROM and RAM, building memory subsystems using smaller modules. Concept of memory hierarchy, cache memory, cache performance, cache-main memory mapping.

[Zaky] 5.1, 5.2.1, 5.2.2, 5.3, 5.4, 5.5, 5.6, 5.7 , 5.8,5.9 [Mano]

12.1, 12.2, 12.3, 12.5, 12.6 (optional)

 

Input-output systems :

Programmed I/O, Interrupt-driven I/O, polling and vectored interrupt, basic concept of DMA transfer. [Zaky] 2.7, 4.1,4.2,4.4,4.5,4.7 [Mano] 11-2, 11-4, 11-5[daisy chain] , 11-6 Pipelining : Basics of pipeline [Zaky] 8.1 to 8.5, 8.8 [Mano] 9.2, 9.3, 9-4 ....

 

Specific breakdown for Zaky and Hamacher (5th Edition)

• Chapter 2 (Machine Instr.) 2.1.1 to 2.1.4, 2.2 , 2.4, 2.5, 2.7, 2.9

• Chapter 4 (I/O organization) 4.2, 4.4, 4.5, 4.7.

• Chapter 5 (The memory system) 5.1 to 5.9.

• Chapter 6 (Arithmetic) 6.1, 6.3, 6.4(booth algo) , 6.6, 6.7 .

• Chapter 7 (Basic processing unit) 7.1, 7.2, 7.4, 7.5 .

• Chapter 8 (Pipelining) 8.1 to 8.5 and 8.8 Among these topics cache access policy, pipeline and m/c instructions are very important....

 

 

Types of Problems

• Addressing Modes : Theory and questions

• Numerical related to program counter after some instruction, no of one address-two address instructions, Values after shift and rotate instructions, horizontal and vertical programming related questions.

• Numerical Problems on Speed up of pipeline, time taken to complete instruction in pipeline and non-pipeline architectures, Hazards in pipeline, hazards removal, branch penalty etc.

• Numerical Problems on cache memory organization, mapping technique, multilevel caches, write through and write back technique …

 

https://drive.google.com/file/d/0Byt7-j-JD0d0bmxlRkZGcjN2cjA/view 

 

 

1. https://www.mediafire.com/folder/gp6z7khjzyl8d/gate_materials?fbclid=IwAR3VYv0LVeZPtp051xCmozcqoTfAFaeEI3g0p9W_i1Z67e8J_SGFc-o2AQM#vynf5o6pb4zxb 

 

2. http://www.mediafire.com/file/5t8cwqiu8w308qc/hamacher_and_zaki_COA.djvu/file?fbclid=IwAR2YCAeNg0XTYxD_nsP_ci2w7un83WigRkgksqDcrFOPH4zvcSTtLdQsRGI 

 

3. http://www.mediafire.com/file/ayjopd8y08okg2k/Computer_Architecture_by_Moris_Mano_3rd_edition.pdf/file?fbclid=IwAR3Zp2N7qT-Z-N7rkUU93Ngt9XmfWEGMwvVeEyS1IdxP8UMqlEbWGKghFc0 

 

4. https://www.mediafire.com/folder/gp6z7khjzyl8d/gate_materials?fbclid=IwAR3sw1z13aNsW_ewuyT-ecNx1ob_yVEpnf3urrt2XjKx6ugonUvRUkYacLw#mp3qyi2prh3fb 

 

5. http://www.mediafire.com/file/qs45ptu718f1an1/Computer_Organization_Hamacher_Instructor_Manual_solution_-_chapter_2.pdf/file?fbclid=IwAR3VYv0LVeZPtp051xCmozcqoTfAFaeEI3g0p9W_i1Z67e8J_SGFc-o2AQM  

 

6. http://www.mediafire.com/file/xa90cy394jf12ve/Computer_Organization_Hamacher_Instructor_Manual_solution_-_chapter_5.pdf/file?fbclid=IwAR1hTcj_pBNXVNelQq9WvAeyb7bh069ELLmuIY_JsTTEkPChFMrfUlgWlrI 

 

7. http://www.mediafire.com/file/jk82xskb1909l6k/Computer_Organization_Hamacher_Instructor_Manual_solution_-_chapter_8.pdf/file?fbclid=IwAR3DqYyzMIfDodycSEgvPx4HHDDdjI0eiAxXsCbfvw5iLKUV3lflJRPodjw

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