Recent questions tagged made-easy-test-series - GATE CSE Doubts

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Made Easy COA Subject Wise
Consider a two level cache memory organization. L1 has an accessing time 30 ns and main memory access time 200 ns. Assume the hit ratio for read operation is 0.65 and 45% reference are for the write operation. The average access time for system(in ns) if it uses write through technique __________.

asked Sep 8 in CO & Architecture by Ollie (459 points) | 80 views

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Made Easy Subject Wise COA
Consider 2 MBPS I/O device interfaced to 64 bit CPU in a programmed I/O mode. Data transmission between the CPU and I/O in word wise. interrupt overhead is 3 μ sec. What is the performance gain when the device is operating under interrupt I/O over programmed I/O mode? (Please suggest some resource also to study for this topic)

asked Sep 8 in CO & Architecture by Ollie (459 points) | 65 views

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Made Easy Test Series - OS: Memory Management
I think the answer should be B). S1 is incorrect. This is because TLB needs to be saved on a context switch. TLB stores frame numbers of frequently referred pages and therefore it has to be updated on a context switch between the process. We cannot simply flush it for a process going out. Please clarify. Thanks!

asked Sep 8 in Operating System by sankalpmittal (41 points) | 39 views

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Made Easy Test Series - OS: Paging
I think the answer should be 22 MB. We get Page Table Entry size = (22/8) B Page table size = 2^23 * 22/8 B = 22 MB. Why have they rounded 22/8 as 3B? Answer should be 22 MB and not 24 MB. Please clarify. Thanks!

asked Sep 8 in Operating System by sankalpmittal (41 points) | 34 views

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Made Easy Test Series: OS - Process Scheduling
How is the answer LIFO? If I take the following example: Process Arrival Time Burst Time Priority P0 0 3 1 P1 0 5 1 P2 3 3 1 P3 6 4 1 Now we know that the priority is dynamic and so if we draw the Gantt chart: P0 P1 P0 ... (first out) but it is the first to arrive. LIFO is clearly not being followed. Can someone clairify how the answer is LIFO? Thanks!

asked Sep 7 in Operating System by sankalpmittal (41 points) | 20 views

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Made Easy Test Series - OS: Process Scheduling
I think the answer should be 65%. They say 8 processes arrive in 60 seconds. That means the first process will arrive at the time instant t = 7.5s. Now at the time t = 60s, 8th process will be arriving. However till this mark, 7 processes are ... 39s % of time CPU is idle = (39/60) * 100 = 65% Please clarify once if I am correct or not. Thanks!

asked Sep 6 in Operating System by sankalpmittal (41 points) | 31 views

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Made Easy Test Series - Operating Systems: Threads

asked Sep 6 in Operating System by sankalpmittal (41 points) | 29 views

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Made easy test series
Assume that the original machine is an 8-stage pipeline with a 1 ns clock cycle. The second machine is 12 stage pipeline with 0.75 ns clock cycle. The 8-stage pipeline experiences a stall due to data hazard for every 5 instructions, ... be this time I get right solution by chance. Thankyou in advance. Reference question: https://gateoverflow.in/138662/test-series-pipelining

asked Sep 6 in CO & Architecture by Scion_of_fire (47 points) | 22 views

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Made-easy testseries coa
Consider the type addressable memory unit of a computer has 64 K words of 16 bit each. The computer has an instruction format with 4 fields namely opcode, mode field specify 9-addressing modes, register address field with 50 registers and a memory address field. If an instruction is 32 bits long then the number of different instructions are

asked Sep 6 in CO & Architecture by Scion_of_fire (47 points) | 27 views

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Made Easy Practice Questions
Which of the following is not involved in a memory write operation? a) MAR b) PC c) MDR d) Data bus

asked Sep 6 in CO & Architecture by himali15 (5 points) | 33 views

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Made easy Workbook, Self doubt in Minimum Spanning Tree

asked Sep 5 in Algorithms by sarthakdarji (9 points) | 55 views

+1 vote

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Made Easy Subject wise COA
Consider a computer system has a main memory consisting of 2M 16 bit words. It also has a 8k word cache organized in the block set associative manner, with 4 blocks per set and 32 words per block. What is the number of bits in each of the TAG, SET and word field of main memory address format?

asked Sep 5 in CO & Architecture by Ollie (459 points) | 54 views

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Made easy theory book,Self doubt in Hashing Techniques

asked Sep 5 in Programming by sarthakdarji (9 points) | 21 views

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Made Easy Test Series - OS
How is the option C) satisfy bounded waiting? I mean, there can be a case where the process Q keeps on executing the while loop while process P doesn't even get the chance. Bounded waiting is the number of times/bounds after which a ... enter the critical section. The above code clearly does not support bounded wait, even with option C. Can anyone explain? Thanks!

asked Sep 5 in Operating System by sankalpmittal (41 points) | 31 views

+1 vote

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Made Easy Topic Wise Test Series
The question says whether the following language is CFL or not(I replaced $ with &): B = {x&w | w is a substring of x, x$\in$\Sigma ^{*}$, &$\in \Sigma$} As per my understanding, w is a substring of x, and x$\in$\Sigma ^{ ... } = {$\Sigma ^{+}$} which is regular, and therefore CFL But in the answer it was given that it is not CFL, Please someone explain.

asked Sep 4 in Theory of Computation by Ollie (459 points) | 120 views

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Can anyone provide solution to this test series question on CN

asked Sep 3 in Computer Networks by Shashank Rustagi (715 points) | 46 views

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Made easy Work book, Self doubt in Graph Based Algorithms

asked Sep 3 in Algorithms by sarthakdarji (9 points) | 8 views

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CN ME TEST SERIES QUESTION self doubt
Consider a CSMA/CD with frame size is 20 KB and transmission rate is 10 Kbps then maximum length of the cable (km) required, if signal speed is 15 km/sec (Upto 2 decimal places) Is the answer 600?

asked Sep 3 in Computer Networks by Shashank Rustagi (715 points) | 24 views

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Made easy workbook, Graph Based Algorithms
Which of the following is not a cross edge during given BFS traversal on G? a) d,c b) d,b c) e,b d) e,f

asked Sep 2 in Algorithms by sarthakdarji (9 points) | 28 views

+1 vote

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COA made easy test series question on Cache memory mapping

asked Sep 2 in CO & Architecture by Shashank Rustagi (715 points) | 65 views

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Self doubt Made easy theory book Graph Based Algorithms

asked Sep 1 in Algorithms by sarthakdarji (9 points) | 25 views

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multilevel feedback scheduling doubt
with a multilevel feedback scheduler,high priority jobs are placed at top level queue and low priority at bottom level queue is this statement True/False?

asked Sep 1 in Operating System by abcd9982 (87 points) | 33 views

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Made Easy Topic Wise
My answer is DNS Query → HTTP GET Request → TCP SYN Given DNS Query → TCP SYN → HTTP GET Request. Am I correct?

asked Sep 1 in Computer Networks by Mellophi (363 points) | 46 views

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Made Easy Topic Wise
Can someone explain the process?

asked Sep 1 in Computer Networks by Mellophi (363 points) | 47 views

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cycle stealing in DMA doubt
Is this method correct

asked Sep 1 in CO & Architecture by Shashank Rustagi (715 points) | 31 views

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COA Register based question

asked Sep 1 in CO & Architecture by Shashank Rustagi (715 points) | 20 views

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COA MADE EASY TEST SERIES pipelining question
A system employs 8 stage instruction pipeline in which 1-% instructions results in data dependency, 10% instructions results in control dependency and 5% instructions results in structural dependency. 10% instructions are exposed to data and control dependencies. If ... dependency. What is the average instruction time? a)1.1 cc b)1.4cc 3)1.3cc 4)1.5cc

asked Sep 1 in CO & Architecture by Shashank Rustagi (715 points) | 48 views

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Made Easy Topic Wise
How are we considering the address A[15][25] for a LTM? Shouldn’t valid addresses be till i=j ?

asked Aug 30 in Programming by Mellophi (363 points) | 55 views

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Made Easy Topic Wise

asked Aug 30 in Programming by Mellophi (363 points) | 109 views

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MADE EASY TEST SERIES COA

asked Aug 30 in CO & Architecture by Shashank Rustagi (715 points) | 100 views

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MADE EASY TEST SERIES

asked Aug 30 in CO & Architecture by Shashank Rustagi (715 points) | 17 views

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Made Easy TopicWise
What does 5 clock triggers mean here? What is the solution?

asked Aug 28 in Digital Logic by Mellophi (363 points) | 19 views

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MADE EASY DB + CN GATE 2020 test series
Why option B is correct can anyone explain this?

asked Aug 26 in Computer Networks by Shashank Rustagi (715 points) | 29 views

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MADE EASY CN+DBMS TEST SERIES GATE 2020
I only II only Both None Which option is correct give justification

asked Aug 26 in Databases by Shashank Rustagi (715 points) | 25 views

+1 vote

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made easy I/O interrupt mode
how to solve such question when interrupt service time is greater than transfer time??

asked Aug 26 in CO & Architecture by abcd9982 (87 points) | 41 views

+3 votes

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Made Easy Test Series - Algorithms
I understand that S1 is incorrect. But how is S2 correct? In BFS of an undirected graph, there are only cross edges and tree edges. There are neither back edges nor forward edges. Can anyone please clarify? Thanks.

asked Aug 22 in Algorithms by sankalpmittal (41 points) | 59 views

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ME test series question on Regular language
Over the unary alphabet, every Context free language is Regular ?

asked Aug 20 in Theory of Computation by Brij gopal Dixit (21 points) | 147 views

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coa madeeasy doubt
ALU instruction in a RISC instruction pipeline will not have any operation in MEM stage of pipeline is this statement true because ALU operations in RISC do not use memory access (like load/store)??

asked Aug 20 in CO & Architecture by abcd9982 (87 points) | 34 views

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ME Theory Book
The gates $G_{1}$ and $G_{2}$ in the figure have the propagation delay of 10 nsec and 20 nsec respectively. If the input $V_{i}$ makes an abrupt change from logic 0 to logic 1 at time t = $t_{0}$ then the output waveform $V_{0}$ is – Answer given is – b. Please explain in detail.

asked Aug 17 in Digital Logic by Kindaichi (8 points) | 26 views

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ME Theory Book
My approach – - Convert $(54)_{16}$ to decimal which equals to $(84)_{10}$. - Now equation becomes $(54)_{10}-(84)_{10}$ - Take 10’s complement of $(84)_{10}$ and add to $(54)_{10}$ - Equation – $(54)_{10}+(16)_{10} = (70)_{10}$ - $(70)_{10} = (46)_{16}$ - $(46)_{16}=(01000110)_{2}$ Where am I going wrong?

asked Aug 17 in Digital Logic by Kindaichi (8 points) | 51 views

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