Recent questions tagged test-series - GATE CSE Doubts

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Gate Applied Course
Suppose: TLB lookup time = 20 ns TLB hit ratio = 80% Memory access time = 75 ns Swap page time = 500,000 ns 50% of the pages are dirty OS uses a single level page table What is the effective access time (EAT) if we assume the page fault rate is 10%? ... update the TLB, the page table, and the frame table (if needed) is negligible. A 15106 ns B 76000 ns C 15200 ns D 75110 ns

asked Feb 11 in Operating System by GopiChand (9 points) | 33 views

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MADEEASY TEST SERIES
https://gateoverflow.in/3622/gate2006-it-78 with reference to the concept used in previous year question the answer for the true data dependencies in the following question should be 5 ?? but solution is given as 3... M[100<-r1 r2<-M[700] r1<-r2 / r1 r2<-r1+r2 M[500]<-r2 M[200]<-r1

asked Feb 9 in CO & Architecture by eyeamgj (29 points) | 10 views

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ACE Test Series
What is the minimum no of states in DFA which accepts the language generated by reg exp (0*1)*1(0+1)* ?. Is this binary strings containing 1? Pls Answer.

asked Feb 9 in Theory of Computation by akashks (5 points) | 27 views

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Made Easy Test series
find the total number of subnets available and broadcast address is given mask is 255.255.255.224 and IP is 192.168.0.102?

asked Feb 8 in Computer Networks by arshin jain (5 points) | 12 views

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madeeasy test series
can we apply master theorm for 2T(n/2)+(n/logn) ? answer says no but as i am following extended master theorm it says we can…

asked Feb 8 in Algorithms by eyeamgj (29 points) | 24 views

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Made easy test
In this question, it is asked to retrieve the name of each employee who has a dependent with the same first name and is the same sex as employee. How Q1 will give the correct result, coz inside IN() the condition Essn=D,Essn is not there. Can anybody explain.

asked Feb 6 in Databases by Ankita87077 (11 points) | 23 views

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Tga test series
Why dirty read ? Here T2 was commited after the T1....what about the option c?

asked Feb 5 in Databases by Enolx.21 (49 points) | 11 views

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Made easy test series
Consider the following table: A B C a1 b1 c1 a1 b1 c2 a2 b1 c1 a2 b1 c3 Number of non-trivial functional dependencies exists in the above Table ___________.

asked Feb 4 in Databases by vikashrajpoot0100 (5 points) | 20 views

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Made easy test series
Number of sorting algorithms given below that has a time complexity of O(n^2) : Selection sort Merge sort Bubble sort Quick sort Answer for this should be 3, but in made easy test solution they have given answer as 4, can time complexity of merge sort be O(n^2) ??

asked Feb 3 in Programming by Ankita87077 (11 points) | 24 views

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ACE Test Series
$A. Regular$ $B. CSL but not CFL$ $C. CFL$ $D. CSL$ Solution given is

asked Feb 2 in Theory of Computation by Parth27 (163 points) | 22 views

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TOC Made easy
Consider the grammar consisting of seven productions. S → aA | aBB A → aaA | λ B → bB | bbC C → B After elimination of unit, useless, and λ -productions how many productions remain in the resulting grammar ? 2 3 4 5

asked Feb 2 in Theory of Computation by kirtipurohit (7 points) | 19 views

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Made Easy Test
How to solve it?

asked Jan 29 in Compiler Design by Parth27 (163 points) | 24 views

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Testbook Testseries COA
Consider a hypothetical system that uses Direct Memory mode access(DMA) mode to transfer the data from the hard disk to the main memory. If the size of the DMA controller's data count register is 32 bits. A file of 1024 GB needs to transfer ... DMA controller needs to get the control of the system bus if the system is byte-addressable? Please explain, the answer was 256.

asked Jan 25 in CO & Architecture by Abhipsa (17 points) | 25 views

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Applied Course Mock Test 7 [2021]
Q14. [Computer Architecture - Pipelining] Consider the following sequence of instructions -: $LD\ R1, 50\ (R2)\ \ //\ R1= M[R2+50]$ $ADD\ R3,\ R1,\ R4$ $LD\ R5, 100(R3)\ \ //\ R5 = M[R3+100]$ ... searched and tracked this question down to an old Northern Kentucky University Architecture course. Is this standard in GATE, or will all fields be specified separately?

asked Jan 24 in Others by pritishc (27 points) | 62 views

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Made easy test series
Consider a cache of 2y blocks, and the main memory of 2y blocks. At what set location (y+4)th block will be mapped in 2-way set associative? In this question, it is asking about (y+4)th block of main memory, then it would be numbered (y+3) in the main memory, so it should get mapped at set location 3. But answer in made easy test is given 4. Is it correct??

asked Jan 24 in CO & Architecture by Ankita87077 (11 points) | 19 views

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The Gate Academy Control Unit Design Test
Please explain. The answer given was 3072 B.

asked Jan 23 in CO & Architecture by Abhipsa (17 points) | 34 views

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testbook operating system sub test 1
Consider a variable partitioning technique for allocation of memory to processes. There are currently 4 partitions of size 50 MB, 150 MB, 250 MB, and 350 MB. The smallest partition that could be denied for a total memory of 3500 MB is _____ MB. (answer in integer)

asked Jan 21 in Operating System by Abhipsa (17 points) | 25 views

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Testbook OS subject test 2
In a certain computer, the virtual addresses are 32 bits long and the physical addresses are 48 bits long. The memory is word addressable. The page size is 16 kB and the word size is 2 bytes. The Translation Look-aside Buffer (TLB) in the ... 64 valid entries. Hit ratio of TLB is 100% then maximum number of distinct virtual addresses that can be translated is _____ K.

asked Jan 21 in Operating System by Abhipsa (17 points) | 20 views

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Made Easy Test Series
Time complexity of an algorithm $T(n)$ where n is the input size is given by $T(n)$ =$(T(n-1)+1)/n$ if $n>1$ $T(n) = n$ otherwise $logn$ $n$ $n^2$ $n^n$

asked Jan 21 in Algorithms by Parth27 (163 points) | 27 views

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Ace Test Series
In this functional dependency there is no transitive dependency so it will be in 3 NF but it has partial dependency. So whether it will be 2 NF or not. As 3NF must be in 2NF. This is MSQ.

asked Jan 19 in Databases by Diya07 (5 points) | 14 views

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MadeEasy Test Series
Can someone explain why progress isn’t there ? If thread A execute LineNo 1 and then prempts and thread B execute LineNo1 then deadlock is pretty much possible here, and if thread A doesn”t want to access CS, how come it stop thread B from accessing it, so I think progress is guaranteed… Can somebody explain why?

asked Jan 18 in Operating System by FreddieMercury (9 points) | 10 views

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Applied Gate Test Series
IHow to calculate this ?

asked Jan 17 in Algorithms by ravisingh1651 (19 points) | 30 views

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Applied GATE test series
Que Consider a circular queue which is of capacity 100 elements and is implemented on an array a[0...99], at a particular instant the front pointer is pointing to index 20 and the rear is pointing at index 10 the number of elements present in the queue is. 10 90 91 None

asked Jan 16 in DS by _tourist_ (5 points) | 59 views

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Made Easy Test Series
How to Differentiate Option A and B?

asked Jan 15 in Algorithms by Parth27 (163 points) | 17 views

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Made Easy Test series
Answer will 8 or 9? i got 9 (according to me no optimization should be done in Intermediate representation form)

asked Jan 13 in Compiler Design by Nitinkumar.097 (13 points) | 16 views

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Made easy test series
how? can u plese draw them?

asked Jan 13 in Databases by Salla shivateja (19 points) | 24 views

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self doubt madeeasy test series
https://gateoverflow.in/311536/made-easy-test-series-binary-tree how tree will look like ...please see

asked Jan 12 in DS by eyeamgj (29 points) | 24 views

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Made Easy Test Series
$A. O(n (logn)^2) $ $B. O(n^2 logn) $ $C. O(n^2) $ $D. O(n log(log(n)))$

asked Jan 12 in Algorithms by Parth27 (163 points) | 18 views

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ME test series
Which of the following statements are true? S1: Doubling the line size halves the number of tags in the cache. S2 : Doubling the associativity increases the number of tags in the cache. S3 : Doubling the line size usually reduce compulsory misses. How to approach such kind of question?

asked Jan 12 in CO & Architecture by Abhineet Singh (23 points) | 33 views

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ME test series
Consider a RISC processor with an ideal CPI, where 25% of the total instructions are load and store instruction. Time to accessing main memory is 100 clock cycles and accessing of the cache memory required 2 clock cycles and cache miss rate is 2%. Which of the following are ... misses is 2.9. D CPI for the handling cache hits is 2.45. How to solve this, unable to get any option...

asked Jan 12 in CO & Architecture by Abhineet Singh (23 points) | 39 views

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ME test series
Which of the following are correct?(MSQ) A Compulsory misses can be reduced by increasing the block size. B The search concept used in associative memory is parallel search. C Conflict misses can be reduced by increasing block size. D Reducing block ... spatial locality. I'm having some trouble in approaching these type of questions. Please tell how to solve these type of questions

asked Jan 12 in CO & Architecture by Abhineet Singh (23 points) | 7 views

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TGA test series
Consider the following table P and Q .In table P, A is Primary key and B is foreign key referencing C in table Q with on delete Cascade.In table Q C is primary key and D is foreign key referencing A in table P with on delete Cascade.in order to delete record (2,6) from the table P.the ... 9 6 (Q C D 1 1 6 2 2 1 9 7 5 9 7 1 Last row of P is blanck by mistake it is added..ignore it)

asked Jan 10 in Databases by Enolx.21 (49 points) | 30 views

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applied courses test
Are the given Bernstein’s Conditions necessary to be checked?

asked Jan 10 in Operating System by Abhilash Behera (5 points) | 16 views

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operating system-Ace test series

asked Jan 9 in Operating System by val_pro20 (2 points) | 54 views

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Computer network (self doubt)
In datagrams fragmentation occurs at routers. What about in virtual circuits? As CPU bandwidth and buffers are reserved, is there a chance for fragmentation to occur in router?

asked Jan 9 in Computer Networks by Kishore7 (5 points) | 10 views

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made easy test series
please explain iam unable understand this

asked Jan 8 in Mathematical Logic by Salla shivateja (19 points) | 30 views

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Source : Applied GATE test series
In a two-level cache system, the access time of the L1 cache is 20ns and L2 cache is 40ns. If the hit rate of L1 is 80% and L2 is 90% and the miss penalty on a cache miss is 10 ns. The average memory access time is________ (nsec) a. 28.2 b. 23.4 c. 25.6 Please provide the formula and proper explanation of solution.

asked Jan 7 in CO & Architecture by _tourist_ (5 points) | 34 views

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Ace test series

asked Jan 7 in Theory of Computation by val_pro20 (2 points) | 37 views

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Applied Test Series OS
Consider a system that has four processes, P0, P1, , P3. The process details are mentioned in the table below : Which of the following are correct? Burst Time of P0 is 10 Completion Time of P1 is 15 Completion Time of P2 is 17 Burst time of P3 is ... algo is not given so how they have drawn the gannt chart and said P2 completed before P3 and same is the case for P1 .

asked Jan 4 in Operating System by Nitinkumar.097 (13 points) | 16 views

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Applied test Series DBMS
Consider the following relation R with attributes as A, B, C, D, and E with functional dependencies (FDs) as marked below: For example, the arrow coming from attribute B is towards the attribute C, therefore, the FD will be B -> C. Which of the ... -prime attributes. Therefore, the relation R is neither in 2NF nor in 3NF. Hence, the correct options are (iii), and (iv).

asked Jan 4 in Databases by Nitinkumar.097 (13 points) | 40 views

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